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n- well p-channel transistor p- well n-channel transistor p+ substrate Transistor Layers Device Device Microelectronic Microelectronic Prof. Dr. Ir. Djoko Prof. Dr. Ir. Djoko Hartanto MSc Hartanto MSc Jurusan Elektro Jurusan Elektro Fakultas Teknik Fakultas Teknik Universitas Indonesia Universitas Indonesia Semester Genap 2003 Semester Genap 2003
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Device Microelectronic

Feb 25, 2016

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Transistor Layers. p-well. n-well. n-channel transistor. p-channel transistor. p+ substrate. Device Microelectronic. Prof. Dr. Ir. Djoko Hartanto MSc. Jurusan Elektro Fakultas Teknik Universitas Indonesia Semester Genap 2003. SAP. Satuan Acara Pengajaran. SKS: 3 Staf Pengajar - PowerPoint PPT Presentation
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Page 1: Device Microelectronic

n-wellp-channel transistor

p-welln-channel transistor

p+ substrate

Transistor Layers

Device Device MicroelectronicMicroelectronic

Prof. Dr. Ir. Djoko Hartanto MScProf. Dr. Ir. Djoko Hartanto MSc

Jurusan Elektro Jurusan Elektro Fakultas Teknik Universitas Fakultas Teknik Universitas

IndonesiaIndonesiaSemester Genap 2003Semester Genap 2003

Page 2: Device Microelectronic

SAPSAP SKSSKS : 3: 3 Staf PengajarStaf Pengajar

PJ: Prof. Dr. Ir. Djoko Hartanto MSc. (DH)PJ: Prof. Dr. Ir. Djoko Hartanto MSc. (DH) Ang: Arief Udhiarto, ST. (AU)Ang: Arief Udhiarto, ST. (AU)

Sistem KelasSistem Kelas : Tunggal: Tunggal Sistem Evaluasi (dalam %)Sistem Evaluasi (dalam %)

(20) Tugas. (20) Tugas. (30) Midtest, (30) Midtest, (30) UAS, (30) UAS, (20) Seminar(20) Seminar

Page 3: Device Microelectronic

Tanggal Pokok Bahasan dan Isi Bahasan Media* Tugas Dosen

1. 04-02-02 1. Pre-test2. The development of IC3. Processing Overview

Power-Point (PP)

Topics for Seminar, Design Model Device-Fab., Journals.

DH

2. 07-02-02 Thermal Oxidation of Silicon-11. Properties of matters2. Kinetics of Oxidation

PP DH

3. 11-02-02 Thermal Oxidation of Silicon-21. Oxide Thickness Charts2. Preparation of Thermal Oxide

PP Homework (HW) –1 Calculation of depth diffusion

DH

4. 14-02-02 Thin Film Deposition1. Evaporation2. Chemical Vapor Deposition

PP DH

5. 18-02-02 Lithography –1• Photomasks• Photoresists

PP Collect HW-1 DH

6. 21-02-02 Lithography-2• Resolution• Linewidth

PP DH

7. 25-02-02 Etching-11. Wet Etching2. Dry Etching

PP HW-2 Resolution / linewidth

Problems

DH

8. 28-02-02 Etching-21. Plasma Etching2. Vapor Phase Etching

PP DH

9. 04-03-02 Epitaxy1. Vapor Phase Epitaxy2. Liquid Phase Epitaxy

PP Collect HW-2 DH

Page 4: Device Microelectronic

10. 07-03-02 Diffusion-11.Atomic Diffusion Mechanisms2.Diffusion Characterization

DH

11. 11-03-02 Diffusion-21.Diffusion Processes2.Diffusion Equipments

PP DH

12. 14-03-02 Diffusion-31.Diffusion Sources2.The Error Function

PP DH

13. 18-03-02 Diffusion Profile PP DH

14. 21-03-02 Ion Implantation PP AU

15. 25-04-02 •Ohmic Contact •Schottky Barriers

PP AU

16. 28-04-02 Interconnect PP DH

17. 01-04-02 MAGIC-1 PP AU

18. 04-04-02 MAGIC-2 PP AU

19. Lihat Jadwal Midtest

Midtest DH, AU

20. 15-04-02 Laboratory visit AU

Page 5: Device Microelectronic

21. 22-04-02 SPICES-1 AU

22. 25-04-02 SPICES-2 PP AU

23. 29-04-02 SUPREM-1 PP AU

24. 02-05-02 SUPREM-2 PP AU

25. 06-05-02 Seminar-1 PP AU

25. 09-05-02 Seminar-2 PP AU

26. 13-05-02 Seminar-3 PP AU

27. 20-05-02 Seminar-4 PP AU

28. 23-05-02 Seminar-5 PP AU

29. Lihat Jadwal Ujian Akhir

Final Test DH,AU

Page 6: Device Microelectronic

Pre-TestPre-Test

1.1. Sebutkan empat tahap utama dalam Sebutkan empat tahap utama dalam proses proses microchip fabricationmicrochip fabrication ! !

2.2. Apa yang dimaksud dengan Apa yang dimaksud dengan photolithographyphotolithography??

3.3. Apa fungsi Apa fungsi packagingpackaging dalam proses dalam proses pabrikasi?pabrikasi?

Page 7: Device Microelectronic

Terms and Concepts to be Terms and Concepts to be Covered in this LessonCovered in this Lesson

• siliconsilicon• substratesubstrate• monocrystallinemonocrystalline• polycrystallinepolycrystalline• epitaxial silicon epitaxial silicon

growthgrowth• polysiliconpolysilicon• silicon dioxide silicon dioxide • oxideoxide

• silicon nitridesilicon nitride• metalmetal• dopantdopant• dopingdoping• concentrationconcentration• diffusiondiffusion• field effect field effect

transistortransistor• source, drain, gatesource, drain, gate

Page 8: Device Microelectronic

Terms and Concepts to be Terms and Concepts to be Covered in this LessonCovered in this Lesson

• MOSMOS• NMOS technologyNMOS technology• n-channeln-channel• PMOS technologyPMOS technology• p-channelp-channel• CMOS technologyCMOS technology• p-wellp-well• n-welln-well• photoresistphotoresist• photomaskphotomask

• exposureexposure• diffusiondiffusion• thin filmsthin films• photolithographyphotolithography• etchetch• ion implantion implant• polish, CMPpolish, CMP• planarizationplanarization• strips and cleansstrips and cleans• test and sorttest and sort

Page 9: Device Microelectronic

Variations in Dopant Variations in Dopant ConcentrationsConcentrations

Concentration P-type N-type

lightly doped p- n-

very lightly doped p-- n--

heavily doped p+ n+

very heavily doped p++ n++

Page 10: Device Microelectronic

Processing OverviewProcessing OverviewTahap-tahap pabrikasi chip ICTahap-tahap pabrikasi chip IC

1.1. Material PreparationMaterial PreparationConvert silicon dioxside to semiconductor-grade siliconConvert silicon dioxside to semiconductor-grade silicon

2.2. Crystal Growth and Wafer Preparation Crystal Growth and Wafer Preparation Convert polysilicon to silicon waferConvert polysilicon to silicon wafer

Crystal growingCrystal growing Slice cutting and polishingSlice cutting and polishing Photomask manufacturingPhotomask manufacturing

Page 11: Device Microelectronic

Procesing OverviewProcesing Overview

3.3. Wafer FabricationWafer Fabricationa.a. Cleaning of surfacesCleaning of surfacesb.b. Growth of epitaxial layerGrowth of epitaxial layerc.c. Thermal oxidation of siliconThermal oxidation of silicond.d. Patterning of the various layers Patterning of the various layers

(lithography)(lithography)e.e. Diffusion of impurities into siliconDiffusion of impurities into siliconf.f. Ion implantation of impuritiesIon implantation of impurities

Page 12: Device Microelectronic

1212

Wafer FabricationWafer Fabricationg.g. Chemical vapor deposition of polycristalline siliconChemical vapor deposition of polycristalline siliconh.h. Etching of silicon and GaAsEtching of silicon and GaAsi.i. Deposition of insulating layers (silicon oxide or Deposition of insulating layers (silicon oxide or

nitride)nitride)j.j. Etching of insulating layers (silicon oxide or Etching of insulating layers (silicon oxide or

nitride)nitride)k.k. Depositon of conductive layers (metal, polysilicon, Depositon of conductive layers (metal, polysilicon,

other)other)l.l. Alloying (sintering) to form metal-silicon electrical Alloying (sintering) to form metal-silicon electrical

contactcontact

Page 13: Device Microelectronic

Wafer FabricationWafer Fabricationm.m. Backgrinding (thinning of wafer by Backgrinding (thinning of wafer by

grinding)grinding)n.n. Multiprobing (DC electrical testing of each Multiprobing (DC electrical testing of each

IC on wafer)IC on wafer)

Page 14: Device Microelectronic

4. Packaging4. Packaginga.a. Cutting or breaking of wafers into individual Cutting or breaking of wafers into individual

chipschipsb.b. Packaging of individual chipsPackaging of individual chipsc.c. Full AC dan DC electrical testing of Full AC dan DC electrical testing of

packaged ICspackaged ICs

Page 15: Device Microelectronic

Fabrication process of a simple metal oxide semiconductor (MOS) transistor

silicon substratesource drain

gategateoxideoxide oxideoxide

top nitride

metal connection to source

metal connection to gate

metal connection to drain

polysilicon gatedoped silicon

field oxide

gate oxide

Page 16: Device Microelectronic

The manufacture of a single MOS transistor begins with a silicon substrate.

silicon substrate

Page 17: Device Microelectronic

A layer of silicon dioxide (field oxide) provides isolation between devices manufactured on the same substrate.

silicon substrate

oxideoxide

field oxide

Page 18: Device Microelectronic

Photoresist provides the means for transferring the image of a mask onto the top surface of the wafer.

silicon substrateoxideoxide

photoresistphotoresist

Page 19: Device Microelectronic

Shadow on photoresist

photoresistphotoresist

Exposed area of photoresist

Chrome platedglass mask

Ultraviolet Light

silicon substrate

oxideoxide

Ultraviolet light exposes photoresist through windows in a photomask.

Page 20: Device Microelectronic

Shadow on photoresist

photoresistphotoresist

Exposed area of photoresist

Chrome platedglass mask

Ultraviolet Light

silicon substrate

oxideoxide

Ultraviolet light exposes photoresist through windows in a photomask.

Page 21: Device Microelectronic

Exposed photoresist becomes soluble and can be easily removed by the develop chemical.

Unexposed area of photoresist

silicon substrate

Exposed area of photoresist

oxideoxidephotoresistphotoresist

Page 22: Device Microelectronic

Unexposed photoresist remains on surface of oxide to serve as a temporary protective mask for areas of the oxide that are not to be etched.

Shadow on photoresist

silicon substrate

oxideoxide

photoresistphotoresistphotoresist

Page 23: Device Microelectronic

Areas of oxide protected by photoresist remain on the silicon substrate while exposed oxide is removed by the etching process.

silicon substrate

oxideoxide oxideoxide

silicon substrate

photoresistphotoresist

Page 24: Device Microelectronic

The photoresist is stripped off -- revealing the pattern of the field oxide.

silicon substrate

oxideoxide oxideoxide

silicon substrate

field oxide

Page 25: Device Microelectronic

A thin layer of oxide is grown on the silicon and will later serve as the gate oxide insulator for the transistor being constructed.

silicon substrate

oxideoxide oxideoxide

gate oxidegate oxide

thin oxide layer

Page 26: Device Microelectronic

The gate insulator area is defined by patterning the gate oxide with a masking and etching process.

silicon substrate

oxideoxide oxideoxide

gate oxide

Page 27: Device Microelectronic

Polysilicon is deposited and will serve as the building material for the gate of the transistor.

silicon substrate

oxideoxide oxideoxide

gate oxide

polysiliconpolysilicongate oxide

Page 28: Device Microelectronic

The shape of the gate is defined by a masking and etching step.

silicon substrate

oxideoxide oxideoxidegategategate

ultra-thin gate oxide

polysilicongate

Page 29: Device Microelectronic

Dopant ions are selectively implanted through windows in the photoresist mask.

silicon substrate

oxideoxide oxideoxidegategategate

photoresistphotoresist

Scanning direction of ion beam

implanted ions in active region of transistors

Implanted ions in photoresist to be removed during resist strip.

source drain

ion beam

Page 30: Device Microelectronic

The source and drain regions of the transistor are made conductive by implanting dopant atoms into selected areas of the substrate.

silicon substrate

oxideoxide oxideoxidegategategate

source drain

doped silicon

Page 31: Device Microelectronic

A layer of silicon nitride is deposited on top of the completed transistor to protect it from the environment.

silicon substrate

source draingategate

top nitridetop nitride

Page 32: Device Microelectronic

Holes are etched into selected parts of the top nitride where

metal contacts will be formed.

silicon substrate

source draingategate

contact holes

Page 33: Device Microelectronic

Metal is deposited and selectively etched to provide electrical contacts to the three active parts of the transistor.

silicon substratesource drain

gategateoxideoxide oxideoxide

metal contacts

Page 34: Device Microelectronic

Completed structure of a simple MOS transistor

silicon substratesource drain

gategateoxideoxide oxideoxide

top nitride

metal connection to source

metal connection to gate

metal connection to drain

polysilicon gatedoped silicon

field oxide

gate oxide

Page 35: Device Microelectronic

Test/Sort

Thin Films

Photo

Implant

Diffusion Etch

Polish

Manufacturing Areas in Wafer FabWafer Fabrication (front-end)

Bare silicon wafer

Completed product

Page 36: Device Microelectronic

Common Terms in Wafer Fab

• Diffusion– high temperature processes– atmospheric - low vacuum pressures– oxidation, anneal, alloy, deposition, diffusion

• Photolithography– patterning process (masking)– photoresist coating– exposure to UV light– develop

Page 37: Device Microelectronic

Common Terms in Wafer Fab

• Etch– selective removal of specific materials– permanent patterning of wafer– low vacuum - high vacuum pressure– RF power, plasma etching

• Ion Implant– selective doping of specific areas of wafer– through windows in photoresist or oxide– high voltage, high vacuum, ion acceleration

Page 38: Device Microelectronic

Common Terms in Wafer Fab

• Thin Films– moderate temperatures– low vacuum - high vacuum pressures– dielectric films, metals, anneal

• Polish– chemical mechanical polish (CMP)– planarization of wafer surface

Page 39: Device Microelectronic

Common Terms in Wafer Fab

• Strips & Cleans– dry, plasma resist strip– wet, chemical cleans using acid solutions and

solvents

• Test/Sort– automated testing of each die on wafer– discriminate good from bad– determines a fab’s yield– ship to assembly & packaging

Page 40: Device Microelectronic

Typical Wafer Flow in CMOS Fab

Thin Films

Photo

Implant

Diffusion Etch

Test/Sort

Polish

Page 41: Device Microelectronic

CMOS Inverter TechnologySchematic Diagram

Top view of Transistor

Cross-section of Transistor

VDDVSS

Vout

Vin

s d s d

g g

VDDVSS

Vout

Vin

g gs d s d

n-channel transistor

p-channel transistor

p-welln+p+ n+p+

n-substrate

source drainsourcedrainfield oxide

gate oxide

metalpolysilicon gate contact